一种可在667mVpp线性输入范围下实现>100dB SNDR的无放大器无校准SAR ADC

Wei-Hsiang Huang, Su-Hao Wu, Zhi-Xin Chen, Yun-Shiang Shu
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引用次数: 3

摘要

这项工作提出了一个时间复用SAR ADC,支持多达5导联ECG监测,每个读出通道SNDR为100dB。在不使用放大器或校准的情况下,结合双参考架构和失配误差整形(MES)技术增强了其噪声和线性性能,在250Hz带宽内产生>106dB SFDR和109.4dB DR (FoMS,DR=178.9dB)。心电模拟前端(AFE),包括3个直流耦合仪器放大器(IAs)和1个ADC,在55nm CMOS中仅占用0.48mm2。每个ECG通道在6V/V的低IA增益和667mVpp-diff线性输入范围下实现1μVrms (0.5-250Hz)的输入参考噪声。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An Amplifier-Less Calibration-Free SAR ADC Achieving >100dB SNDR for Multi-Channel ECG Acquisition with 667mVpp Linear Input Range
This work presents a time-multiplexing SAR ADC to support up to 5-lead ECG monitoring with >100dB SNDR per readout channel. Its noise and linearity performance are enhanced by a combination of dual-reference architecture and mismatch error shaping (MES) technique without using amplifiers or calibration, resulting in >106dB SFDR and 109.4dB DR within 250Hz bandwidth (FoMS,DR=178.9dB). The ECG analog front-end (AFE), including 3 DC-coupled instrumentation amplifiers (IAs) and 1 ADC, occupies only 0.48mm2 in 55nm CMOS. Each ECG channel achieves 1μVrms (0.5-250Hz) input-referred noise at a low IA gain of 6V/V with a 667mVpp-diff linear input range.
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