M. Billmann, S. Werner, Roland Holler, Friedrich Praus, Andreas Puhm, N. Kero
{"title":"fpga的开源加密IP核-概述和评估","authors":"M. Billmann, S. Werner, Roland Holler, Friedrich Praus, Andreas Puhm, N. Kero","doi":"10.1109/Austrochip.2019.00020","DOIUrl":null,"url":null,"abstract":"With the increasing number of electronic based systems being connected to the Internet via wired or wireless connections in the era of the IoT, the importance of security aspects is well recognized. At the same time growth of available complexity and increasing market share of reconfigurable integrated circuits make integration of whole digital systems feasible at relatively low cost. Placing security functions into reconfigurable logic might be advantageous in case of algorithm changes, bug fixes, or updates for hardening of the core against attacks. In this paper we thus want to give an overview of available open-source hardware security building blocks for basic cryptographic functions and show evaluation results of selected cores in FPGA technology.","PeriodicalId":6724,"journal":{"name":"2019 Austrochip Workshop on Microelectronics (Austrochip)","volume":"106 1","pages":"47-54"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Open-Source Crypto IP Cores for FPGAs – Overview and Evaluation\",\"authors\":\"M. Billmann, S. Werner, Roland Holler, Friedrich Praus, Andreas Puhm, N. Kero\",\"doi\":\"10.1109/Austrochip.2019.00020\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With the increasing number of electronic based systems being connected to the Internet via wired or wireless connections in the era of the IoT, the importance of security aspects is well recognized. At the same time growth of available complexity and increasing market share of reconfigurable integrated circuits make integration of whole digital systems feasible at relatively low cost. Placing security functions into reconfigurable logic might be advantageous in case of algorithm changes, bug fixes, or updates for hardening of the core against attacks. In this paper we thus want to give an overview of available open-source hardware security building blocks for basic cryptographic functions and show evaluation results of selected cores in FPGA technology.\",\"PeriodicalId\":6724,\"journal\":{\"name\":\"2019 Austrochip Workshop on Microelectronics (Austrochip)\",\"volume\":\"106 1\",\"pages\":\"47-54\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 Austrochip Workshop on Microelectronics (Austrochip)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/Austrochip.2019.00020\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Austrochip Workshop on Microelectronics (Austrochip)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/Austrochip.2019.00020","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Open-Source Crypto IP Cores for FPGAs – Overview and Evaluation
With the increasing number of electronic based systems being connected to the Internet via wired or wireless connections in the era of the IoT, the importance of security aspects is well recognized. At the same time growth of available complexity and increasing market share of reconfigurable integrated circuits make integration of whole digital systems feasible at relatively low cost. Placing security functions into reconfigurable logic might be advantageous in case of algorithm changes, bug fixes, or updates for hardening of the core against attacks. In this paper we thus want to give an overview of available open-source hardware security building blocks for basic cryptographic functions and show evaluation results of selected cores in FPGA technology.