Design of high-throughput Inter-PE communication with application-level flow control protocol for many-core architectures

With current trend of increasing the number processing elements (PEs) on a single chip, on-chip network provides a fast and reliable interconnect technology for highly parallel applications. Yet, the end-to-end data throughput at software layer on a NoC (Network-on-Chip) platform often cannot match the hardware native speed without an efficient hardware/software interface. In this paper, we present a high-throughput PE-to-PE communication unit with a corresponding driver layer on NoC-based many-core architectures. The proposed communication unit with application-level flow control can handle complicated inter-PE communication for practical parallel applications. The maximum throughput of a unidirectional transmission with flow control protocol at application-level is 2687.3 Mbps (normalized at operating frequency of 100MHz), where the native NoC speed is 3200 Mbps. As a comparison, a software-based protocol is only rated at 148.5 Mbps. The communication unit is also area-efficient at only 19.2K gates, which is roughly 3.2% of a single in-order RISC-based PE.