具有快速负载调节的低功耗LDO电路

2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2016-10-01 DOI:10.1109/APCCAS.2016.7803892

Y. Jang, Seong-Eun Cho, Byungsub Kim, J. Sim, Hong-June Park

{"title":"具有快速负载调节的低功耗LDO电路","authors":"Y. Jang, Seong-Eun Cho, Byungsub Kim, J. Sim, Hong-June Park","doi":"10.1109/APCCAS.2016.7803892","DOIUrl":null,"url":null,"abstract":"By adding a Miller frequency compensation to the conventional LDO circuit that combines the super source follower and the voltage spike detection, a low-power LDO circuit is proposed to drive the load capacitance up to 10 pF with a fast load regulation. The LDO circuit converts a 5 V input to a 3.3V output, consumes 26 μA, and settles in 75 ns at a 10 mA load current step in 1ns.","PeriodicalId":6495,"journal":{"name":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A low-power LDO circuit with a fast load regulation\",\"authors\":\"Y. Jang, Seong-Eun Cho, Byungsub Kim, J. Sim, Hong-June Park\",\"doi\":\"10.1109/APCCAS.2016.7803892\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"By adding a Miller frequency compensation to the conventional LDO circuit that combines the super source follower and the voltage spike detection, a low-power LDO circuit is proposed to drive the load capacitance up to 10 pF with a fast load regulation. The LDO circuit converts a 5 V input to a 3.3V output, consumes 26 μA, and settles in 75 ns at a 10 mA load current step in 1ns.\",\"PeriodicalId\":6495,\"journal\":{\"name\":\"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCCAS.2016.7803892\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2016.7803892","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

通过在传统的LDO电路中加入米勒频率补偿，将超级源跟随器和电压尖峰检测相结合，提出了一种低功耗LDO电路，可以快速调节负载，驱动负载电容达到10 pF。LDO电路将5v输入转换为3.3V输出，功耗26 μA，在10ma负载电流阶跃下，在1ns内稳定在75ns。

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A low-power LDO circuit with a fast load regulation

By adding a Miller frequency compensation to the conventional LDO circuit that combines the super source follower and the voltage spike detection, a low-power LDO circuit is proposed to drive the load capacitance up to 10 pF with a fast load regulation. The LDO circuit converts a 5 V input to a 3.3V output, consumes 26 μA, and settles in 75 ns at a 10 mA load current step in 1ns.

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来源期刊

2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

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