基于传递函数轨迹的大型模拟电路的高效解析宏观建模

Dimitri de Jonghe, G. Gielen
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引用次数: 10

摘要

在定制模拟设计流程中,大型模拟电路的自动抽象大大提高了仿真时间。由于电路的高度多样化,这项任务主要是手工特设的方法。本文提出了一种大规模模拟电路的自动建模方法,该方法可以从SPICE网络表中生成紧凑的表达式。提出的方法建立在最先进的轨迹分段(TPW)方法的基础上。由于其数据驱动的性质,TPW实现生成的模型需要在仿真期间进行动态数据库插值,这并没有嵌入到标准的商业设计流程中。我们的方法通过将TPW样本重组为混合状态空频域的表面来解决这个问题,从而揭示有关电路非线性行为的信息。得到的数据称为传递函数轨迹(TFT),使用参数向量拟合算法进行拟合,并进一步转换为系统块。这些兼容VHDL-AMS/Verilog-AMS, Matlab/Simulink或手动计算在所有设计阶段。对于多达150个节点的大型电路,该模型显示出较高的准确性和相对ELDO模拟器的10×-40×加速。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Efficient analytical macromodeling of large analog circuits by Transfer Function Trajectories
Automated abstraction of large analog circuits greatly improves simulation time in custom analog design flows. Due to the high degree of variety of circuits this task is mainly a manual ad-hoc approach. This paper proposes an automated modeling approach for large scale analog circuits that produces compact expressions from a SPICE netlist. The presented method builds upon the state-of-the-art Trajectory PieceWise (TPW) approach. Because of their data-driven nature, TPW implementations generate models that require on-the-fly database interpolation during simulation, which is not embedded in a standard commercial design flow. Our approach solves this by recombining TPW samples as a surface in a mixed state space-frequency domain, revealing information about the circuit's nonlinear behavior. The resulting data, termed Transfer Function Trajectories (TFT), is fitted with a parametric vector fitting algorithm and further translated to system blocks. These are compatible with VHDL-AMS/Verilog-AMS, Matlab/Simulink or hand calculations at all design stages. The models show high accuracy and a speedup of 10×–40× against the ELDO simulator for large circuits up to 150 nodes.
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