Miller’s Compensation Techniques for a High Gain, High BW OP-AMP at 65 nm Technology

OP-AMPs find applications in different domains of electronics engineering including communications. There have been several OP-AMP configurations realized in the last decades for different target applications. But with the evolution of communication standards, to meet the demand for high data rate over the years, the requirement for a high frequency and high BW OP-AMP is gaining attention. This makes the design challenge much higher. This paper presents a two-stage CMOS amplifier that uses a frequency compensation method to facilitate higher BW. Different parameters like Gain, Gain bandwidth product (GBWP), Phase Margin, and Total Power dissipation are considered in this design. A step-by-step procedure for an efficient amplifier design is followed using frequency compensation. We have achieved a gain-bandwidth product (GBWP) of 110 MHz that is capable of driving large capacitive loads. It also achieves 77.7 dB gain and phase margin of 60° with the minimal noise of 2.27 μ^V/√ Hz and the slew rate of 20.12 V/ms