下游PECVD在In/sub 0.53/Ga/sub 0.47/As上形成硅层

V. Montgomery, D.G. Kimpton, J. Swanson
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引用次数: 0

摘要

利用下游等离子体增强化学气相沉积(PECVD)技术制备了In/sub 0.53/Ga/sub 0.47/As (IGA)-SiO/sub 2/界面,避免了半导体表面暴露在激发等离子体的轰击下。n型和p型In/sub 0.53/Ga/sub 0.47/As与下游PECVD制备的SiO/sub 2/接触后的自然状态为电子积累。在n型材料中,空穴积累是在负绝缘子场下实现的,但对于p-MIS结构,费米能级钉住发生在距价带边缘0.41 eV处。无法形成孔洞堆积。p型表面的静态电子积累状态导致用该材料钝化的结的表面泄漏。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Silica layers formed on In/sub 0.53/Ga/sub 0.47/As by downstream PECVD
In/sub 0.53/Ga/sub 0.47/As (IGA)-SiO/sub 2/ interfaces are prepared by downstream plasma-enhanced chemical-vapor deposition (PECVD), which avoids exposing the semiconductor surface to the bombardment of the exciting plasma. The natural state of n- and p-type In/sub 0.53/Ga/sub 0.47/As in contact with SiO/sub 2/ prepared by downstream PECVD is electron accumulation. In the case of n-type material, hole accumulation is achieved with negative insulator fields, but for p-MIS structures, Fermi level pinning occurs at 0.41 eV from the valence band edge. Hole accumulation could not be established. The quiescent electron accumulated state of the p-type surface causes surface leakage in junctions that are passivated with this material.<>
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