采用可靠性增强技术的+30.5 dBm CMOS Doherty功率放大器

2012 Symposium on VLSI Circuits (VLSIC) Pub Date : 2012-06-13 DOI:10.1109/VLSIC.2012.6243798

Kohei Onizuka, S. Saigusa, S. Otaka

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引用次数: 20

摘要

一种用于2.4 GHz频段的瓦级、全集成1:1 Doherty功率放大器在65nm CMOS上进行了演示。采用该紧凑型输出网络，可实现+30.5 dBm的峰值输出功率和6 dB功率回退时23%的高PAE。一项新引入的可靠性增强技术也将故障时间延长了75%。该PA满足IEEE 802.11b和11g频谱掩模，输出功率分别为25.5和21.5 dBm，电源电压为3.3 V。

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A +30.5 dBm CMOS Doherty power amplifier with reliability enhancement technique

A watt-level, fully integrated 1:1 Doherty power amplifier for 2.4 GHz band is demonstrated in 65 nm CMOS. Both high peak output power of +30.5 dBm and high PAE of 23% at 6 dB power back-off are achieved by the proposed compact output network. A newly introduced reliability enhancement technique for sub-PA prolongs time to failure by up to 75% as well. The PA satisfies IEEE 802.11b and 11g spectrum masks at output power levels of 25.5 and 21.5 dBm respectively, from supply voltage of 3.3 V.

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2012 Symposium on VLSI Circuits (VLSIC)

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