Jae-Hyung Kim, J. Choy, Doohee Song, Youngjong Lee, Kyungho Lee
{"title":"光晕nMOSFET的特性取决于栅极轮廓","authors":"Jae-Hyung Kim, J. Choy, Doohee Song, Youngjong Lee, Kyungho Lee","doi":"10.1109/ICVC.1999.820977","DOIUrl":null,"url":null,"abstract":"Device characteristics with a barrel-type gate profile caused by the proximity effect were investigated. We show that enhanced hot carrier degradation may result and a decrease of the gate to drain overlap capacitance may occur because of the offset region between the LDD region and the gate electrode. Finally we have recommended a method of measuring gate line width (CD, Critical Dimension) for more precise expectations of the device characteristics.","PeriodicalId":13415,"journal":{"name":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","volume":"362 1","pages":"484-486"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The halo nMOSFET characteristics dependent on the gate profile\",\"authors\":\"Jae-Hyung Kim, J. Choy, Doohee Song, Youngjong Lee, Kyungho Lee\",\"doi\":\"10.1109/ICVC.1999.820977\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Device characteristics with a barrel-type gate profile caused by the proximity effect were investigated. We show that enhanced hot carrier degradation may result and a decrease of the gate to drain overlap capacitance may occur because of the offset region between the LDD region and the gate electrode. Finally we have recommended a method of measuring gate line width (CD, Critical Dimension) for more precise expectations of the device characteristics.\",\"PeriodicalId\":13415,\"journal\":{\"name\":\"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)\",\"volume\":\"362 1\",\"pages\":\"484-486\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICVC.1999.820977\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVC.1999.820977","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The halo nMOSFET characteristics dependent on the gate profile
Device characteristics with a barrel-type gate profile caused by the proximity effect were investigated. We show that enhanced hot carrier degradation may result and a decrease of the gate to drain overlap capacitance may occur because of the offset region between the LDD region and the gate electrode. Finally we have recommended a method of measuring gate line width (CD, Critical Dimension) for more precise expectations of the device characteristics.