一个1.6 GS/s 3.17 mW 6-b无源流水线二值搜索ADC，具有记忆效应消除和参考电压校准功能

ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC) Pub Date : 2015-10-30 DOI:10.1109/ESSCIRC.2015.7313893

Koki Tanaka, R. Saito, H. Ishikuro

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引用次数: 2

摘要

提出了一种6位高速低功耗流水线二值搜索ADC。通过无源流水线操作实现了GHz以上的转换速率，无需放大器。通过电荷复位消除了无源管道运行中电荷分担引起的“记忆效应”，提高了变流器频率响应的平整度。记忆效应消除器还可以方便地校准每个比较器的参考电压并增强SNDR。采用40nm-CMOS制作的原型ADC在0.9 V电源电压下以1.6 GS/s的速度实现了29.21 dB的SNDR。该ADC实现了84.1 fJ/ convstep的FoM。

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A 1.6 GS/s 3.17 mW 6-b passive pipelined binary-search ADC with memory effect canceller and reference voltage calibration

A 6-bit high-speed and low-power pipelined binary-search ADC is presented. Over GHz conversion rate is achieved by passive pipeline operation without amplifier. “Memory effect” caused by charge sharing in the passive pipeline operation is cancelled by charge reset and flatness of frequency response of the converter is improved. Memory effect canceller also makes it easy to calibrate reference voltage to each comparator and to enhance SNDR. The prototype ADC fabricated in 40nm-CMOS achieved 29.21 dB SNDR with 1.6 GS/s at supply voltage of 0.9 V. The ADC achieved a FoM of 84.1 fJ/conv.step.

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ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)

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