场效应晶体管的制造建模以确定减小沟道长度的条件

Q4 Computer Science

International Journal of Computer Science and Applications Pub Date : 2014-02-28 DOI:10.5121/IJCSA.2014.4105

P. E.L, Bulaeva E.A

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引用次数: 0

摘要

本文介绍了一种模拟场效应异质晶体管制造工艺过程的方法。该模型为利用机械应力优化工艺流程以减小通道长度提供了可能。随着厚度的减小，构成集成电路的异质晶体管的厚度减小，密度增大。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Modeling of Manufacturing of a Field-Effect Transistor to Determine Conditions to Decrease Length of Channel

In this paper we introduce an approach to model technological process of manufacture of a field-effect heterotransistor. The modeling gives us possibility to optimize the technological process to decrease length of channel by using mechanical stress. As accompanying results of the decreasing one can find decreasing of thickness of the heterotransistors and increasing of their density, which were comprised in integrated circuits.

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来源期刊

International Journal of Computer Science and Applications Computer Science-Computer Science Applications

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期刊介绍： IJCSA is an international forum for scientists and engineers involved in computer science and its applications to publish high quality and refereed papers. Papers reporting original research and innovative applications from all parts of the world are welcome. Papers for publication in the IJCSA are selected through rigorous peer review to ensure originality, timeliness, relevance, and readability.