Haiqiao Xiao, R. Schaumann, W. R. Daasch, P. Wong, B. Pejcinovic
{"title":"一种射频CMOS有源电感及其在高q滤波器设计中的应用","authors":"Haiqiao Xiao, R. Schaumann, W. R. Daasch, P. Wong, B. Pejcinovic","doi":"10.1109/ISCAS.2004.1328974","DOIUrl":null,"url":null,"abstract":"An all-transistor CMOS active inductor with a self-resonance frequency f/sub R/=5.7 GHz is presented. Large f/sub R/ is achieved by forming an all-NMOS signal path. The measured quality factor, Q, is as high as 665, but Q can be infinite theoretically. Both f/sub R/ and Q are tunable via biasing and on-chip varactors. As an example for using the active inductor, a high-Q bandpass filter for radio-frequency applications is designed. The inductor circuit was implemented in TSMC 0.18-/spl mu/m standard digital CMOS technology and occupies an area of 26.6 /spl mu/m/spl times/30 /spl mu/m including double guardrings. For a supply voltage of 1.8 V, the circuit consumes 4.4 mW, and IIP3 is measured at V/sub pp/=270 mV.","PeriodicalId":6445,"journal":{"name":"2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)","volume":"111 1","pages":"IV-197"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"47","resultStr":"{\"title\":\"A radio-frequency CMOS active inductor and its application in designing high-Q filters\",\"authors\":\"Haiqiao Xiao, R. Schaumann, W. R. Daasch, P. Wong, B. Pejcinovic\",\"doi\":\"10.1109/ISCAS.2004.1328974\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An all-transistor CMOS active inductor with a self-resonance frequency f/sub R/=5.7 GHz is presented. Large f/sub R/ is achieved by forming an all-NMOS signal path. The measured quality factor, Q, is as high as 665, but Q can be infinite theoretically. Both f/sub R/ and Q are tunable via biasing and on-chip varactors. As an example for using the active inductor, a high-Q bandpass filter for radio-frequency applications is designed. The inductor circuit was implemented in TSMC 0.18-/spl mu/m standard digital CMOS technology and occupies an area of 26.6 /spl mu/m/spl times/30 /spl mu/m including double guardrings. For a supply voltage of 1.8 V, the circuit consumes 4.4 mW, and IIP3 is measured at V/sub pp/=270 mV.\",\"PeriodicalId\":6445,\"journal\":{\"name\":\"2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)\",\"volume\":\"111 1\",\"pages\":\"IV-197\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-05-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"47\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2004.1328974\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2004.1328974","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A radio-frequency CMOS active inductor and its application in designing high-Q filters
An all-transistor CMOS active inductor with a self-resonance frequency f/sub R/=5.7 GHz is presented. Large f/sub R/ is achieved by forming an all-NMOS signal path. The measured quality factor, Q, is as high as 665, but Q can be infinite theoretically. Both f/sub R/ and Q are tunable via biasing and on-chip varactors. As an example for using the active inductor, a high-Q bandpass filter for radio-frequency applications is designed. The inductor circuit was implemented in TSMC 0.18-/spl mu/m standard digital CMOS technology and occupies an area of 26.6 /spl mu/m/spl times/30 /spl mu/m including double guardrings. For a supply voltage of 1.8 V, the circuit consumes 4.4 mW, and IIP3 is measured at V/sub pp/=270 mV.