使用VerilogA进行单事件电流脉冲建模:实现与应用

Jia Liu, Yusen Qin, T. Li, Yuxin Wang, Weidong Yang, Jun Liu, Ruzhang Li
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引用次数: 0

摘要

在亚100nm的块体CMOS工艺技术中,单事件效应(SEE)成为空间应用中半导体器件和集成电路中最关键的可靠性问题之一。单事件电流脉冲的建模是一个非常重要且具有挑战性的问题。本文给出了器件中SE电流脉冲(SECP)的三维TCAD仿真结果,并利用VerilogA (VA)行为语言建立了紧凑的模型。该模型可用于电路级仿真中辐射硬化(RH)方法的验证。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Using VerilogA for modeling of Single Event current pulse: Implementation and application
In the sub-100nm bulk CMOS process technologies, the Single Event Effect (SEE) becomes one of the most critical reliability issues in the semiconductor devices and ICs that are used for the space applications. The modeling of Single Event (SE) current pulse is very important and challenging. In this paper we give the 3D TCAD simulation results of the SE current pulse (SECP) in the devices, and develop a compact model using VerilogA (VA) behavioral language. This model could be used for the validation of the Radiation-Hardened (RH) approaches in the circuit-level simulations.
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