基于低秩张量近似的紧凑高维屈服分析方法

Xiao Shi, Hao Yan, Qiancun Huang, Chengzhen Xuan, Lei He, Longxing Shi
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引用次数: 2

摘要

“维数诅咒”已成为现有高西格玛良率分析方法面临的主要挑战。在本文中,我们开发了一个使用低秩张量近似(LRTA)的元模型来代替昂贵的SPICE模拟。LRTA模型的多项式度随电路尺寸的增加呈线性增长。这使得它特别有希望解决高维电路问题。我们的LRTA元模型采用鲁棒贪心算法求解,并采用自适应采样方法进行迭代校准。我们还开发了一种新的全局敏感性分析方法来生成更紧凑的简化LRTA元模型。它进一步加快了模型校正和良率估计的过程。在存储器和模拟电路上的实验验证了所提出的LRTA方法在准确性和效率方面优于其他最先进的方法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Compact High-Dimensional Yield Analysis Method using Low-Rank Tensor Approximation
“Curse of dimensionality” has become the major challenge for existing high-sigma yield analysis methods. In this article, we develop a meta-model using Low-Rank Tensor Approximation (LRTA) to substitute expensive SPICE simulation. The polynomial degree of our LRTA model grows linearly with the circuit dimension. This makes it especially promising for high-dimensional circuit problems. Our LRTA meta-model is solved efficiently with a robust greedy algorithm and calibrated iteratively with a bootstrap-assisted adaptive sampling method. We also develop a novel global sensitivity analysis approach to generate a reduced LRTA meta-model which is more compact. It further accelerates the procedure of model calibration and yield estimation. Experiments on memory and analog circuits validate that the proposed LRTA method outperforms other state-of-the-art approaches in terms of accuracy and efficiency.
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