UIS Characterization of LOCOS-Based LDMOS Transistor Fabricated by 1 µm CMOS Process

This paper investigates the ruggedness of an n-type LDMOS under single shot unclamped inductive switching (UIS) stress conditions. We present a detailed method to define the electrothermal safe operating area (SOA), and the physics of the failure mechanism is described. We conclude that the device robustness depends mainly on the gate bias, much less on the pulse duration on millisecond range, the inductive load value, or the initial operating temperature, although the Kirk effect is always present under all conditions. However, the failure mechanism fundamentally changes to pure avalanche breakdown under short pulses.