基于动态半符号分析的模拟电路行为建模

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) Pub Date : 2004-05-23 DOI:10.1109/ISCAS.2004.1329469

Junjie Yang, S. Tan

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引用次数: 2

摘要

本文提出了一种用动态半符号分析方法对模拟电路进行行为建模的方法，其中一些电路参数保留为符号，而其他参数以数值形式给出。我们的新方法是基于线性模拟电路小信号特性的行列式决策图(DDD)表示。其基本思想是动态地重新排序DDD顶点，使所有与符号参数对应的DDD顶点与数值参数对应的DDD顶点分离。这样，通过抑制数值DDD节点，可以显著减小DDD符号部分的DDD大小。我们的新方法不同于现有的基于MTDDD的半符号分析方法，在构造DDD之前进行重新排序，并且基于DDD的图操作在新方法中仍然有效。本文提出的基于相邻变量交换的动态排序算法也改进了现有的基于DDD的顶点筛选算法，因为DDD顶点交换后不需要特殊的符号规则。实验结果表明，与实际模拟电路中的MTDDD方法相比，所提出的动态半符号方法可使符号DDD节点减少30%，并且可以非常高效地进行。

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Behavioural modelling of analog circuits by dynamic semi-symbolic analysis

The paper presents an approach to behavioural modelling of analog circuits by dynamic semi-symbolic analysis, where some circuit parameters are kept as symbols and the others are given as numeric values. Our new method is based on the determinant decision diagram (DDD) representation of small-signal characteristics of linear analog circuits. The basic idea is to dynamically reorder DDD vertices such that all the DDD vertices corresponding to symbolic parameters are separated from DDD vertices for numerical parameters. In this way, DDD sizes of symbolic portion of DDD can be significantly reduced by suppressing numerical DDD nodes. Our new approach is different from the existing MTDDD based semi-symbolic analysis method where reordering is done before DDD is constructed and DDD-based graph operations are still valid in the new method. The proposed dynamic ordering algorithm, which is based on swap of adjacent variables, also improves the existing DDD-based vertex sifting algorithm as no special sign rule is required after DDD vertices are swapped. Experimental results have demonstrated that the proposed dynamic semi-symbolic method leads to up to 30% symbolic DDD node reduction compared MTDDD method on real analog circuits and can be performed very efficiently.

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来源期刊

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)

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