自动驾驶:消息传递并行编程的缓存非相干嵌入式多核处理器

B. Kelly, W. B. Gardner, S. Kyo
{"title":"自动驾驶:消息传递并行编程的缓存非相干嵌入式多核处理器","authors":"B. Kelly, W. B. Gardner, S. Kyo","doi":"10.1145/2489068.2491624","DOIUrl":null,"url":null,"abstract":"The Renesas Electronics IMAPCAR2 embedded realtime image processor combines a single core with a 128-way SIMD array. At runtime, sections of the SIMD array can be reconfigured as additional CPU cores, interconnected via a message ring. Effective use is made difficult by the low-level message passing API and lack of cache coherency between processors. The AutoPilot library addresses this by providing a high-level message-oriented parallel programming model mirroring that of Pilot, itself a wrapper around the Message Passing Interface (MPI) for cluster computing. AutoPilot shows that Pilot's processes-and-channels architecture is a viable choice for parallel programming on cache-incoherent multicore and manycore architectures. It provides a simpler API for programmers, with built-in safety checks that eliminate some common sources of errors. Since the IMAPCAR2 is targeted chiefly at automotive applications, open source AutoPilot has a large degree of MISRA-C compliance.","PeriodicalId":84860,"journal":{"name":"Histoire & mesure","volume":"24 1","pages":"62-65"},"PeriodicalIF":0.0000,"publicationDate":"2013-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"AutoPilot: message passing parallel programming for a cache incoherent embedded manycore processor\",\"authors\":\"B. Kelly, W. B. Gardner, S. Kyo\",\"doi\":\"10.1145/2489068.2491624\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The Renesas Electronics IMAPCAR2 embedded realtime image processor combines a single core with a 128-way SIMD array. At runtime, sections of the SIMD array can be reconfigured as additional CPU cores, interconnected via a message ring. Effective use is made difficult by the low-level message passing API and lack of cache coherency between processors. The AutoPilot library addresses this by providing a high-level message-oriented parallel programming model mirroring that of Pilot, itself a wrapper around the Message Passing Interface (MPI) for cluster computing. AutoPilot shows that Pilot's processes-and-channels architecture is a viable choice for parallel programming on cache-incoherent multicore and manycore architectures. It provides a simpler API for programmers, with built-in safety checks that eliminate some common sources of errors. Since the IMAPCAR2 is targeted chiefly at automotive applications, open source AutoPilot has a large degree of MISRA-C compliance.\",\"PeriodicalId\":84860,\"journal\":{\"name\":\"Histoire & mesure\",\"volume\":\"24 1\",\"pages\":\"62-65\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Histoire & mesure\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/2489068.2491624\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Histoire & mesure","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2489068.2491624","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

瑞萨电子IMAPCAR2嵌入式实时图像处理器将单核与128路SIMD阵列相结合。在运行时,可以将SIMD数组的部分重新配置为额外的CPU内核,并通过消息环相互连接。由于低级消息传递API和处理器之间缺乏缓存一致性,使得有效使用变得困难。AutoPilot库通过提供与Pilot镜像的高级面向消息的并行编程模型来解决这个问题,该模型本身是用于集群计算的消息传递接口(MPI)的包装器。AutoPilot表明Pilot的进程和通道架构是在缓存不一致的多核和多核架构上并行编程的可行选择。它为程序员提供了一个更简单的API,内置的安全检查可以消除一些常见的错误来源。由于IMAPCAR2主要针对汽车应用,因此开源AutoPilot在很大程度上符合MISRA-C标准。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
AutoPilot: message passing parallel programming for a cache incoherent embedded manycore processor
The Renesas Electronics IMAPCAR2 embedded realtime image processor combines a single core with a 128-way SIMD array. At runtime, sections of the SIMD array can be reconfigured as additional CPU cores, interconnected via a message ring. Effective use is made difficult by the low-level message passing API and lack of cache coherency between processors. The AutoPilot library addresses this by providing a high-level message-oriented parallel programming model mirroring that of Pilot, itself a wrapper around the Message Passing Interface (MPI) for cluster computing. AutoPilot shows that Pilot's processes-and-channels architecture is a viable choice for parallel programming on cache-incoherent multicore and manycore architectures. It provides a simpler API for programmers, with built-in safety checks that eliminate some common sources of errors. Since the IMAPCAR2 is targeted chiefly at automotive applications, open source AutoPilot has a large degree of MISRA-C compliance.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信