一种双电压混合NEMS-CMOS低功耗方案

2014 International Semiconductor Conference (CAS) Pub Date : 2014-10-01 DOI:10.1109/SMICND.2014.6966438

M. Tache, Valeriu Beiu, T. Liu

{"title":"一种双电压混合NEMS-CMOS低功耗方案","authors":"M. Tache, Valeriu Beiu, T. Liu","doi":"10.1109/SMICND.2014.6966438","DOIUrl":null,"url":null,"abstract":"In this paper we propose a dual-voltage hybrid NEMS-CMOS scheme to reduce dynamic power consumption. The scheme uses a smaller input/output voltage to propagate information, and a larger voltage to drive (control) the NEMS. CMOS amplifiers are used to interface these two voltages. Gates with a large(r) number of inputs perform better, which matches the optimal NEMS circuit topology. Simulations for a 4-input Boolean function show that power reductions can be significant.","PeriodicalId":6616,"journal":{"name":"2014 International Semiconductor Conference (CAS)","volume":"1 1","pages":"211-214"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A dual-voltage hybrid NEMS-CMOS low-power scheme\",\"authors\":\"M. Tache, Valeriu Beiu, T. Liu\",\"doi\":\"10.1109/SMICND.2014.6966438\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we propose a dual-voltage hybrid NEMS-CMOS scheme to reduce dynamic power consumption. The scheme uses a smaller input/output voltage to propagate information, and a larger voltage to drive (control) the NEMS. CMOS amplifiers are used to interface these two voltages. Gates with a large(r) number of inputs perform better, which matches the optimal NEMS circuit topology. Simulations for a 4-input Boolean function show that power reductions can be significant.\",\"PeriodicalId\":6616,\"journal\":{\"name\":\"2014 International Semiconductor Conference (CAS)\",\"volume\":\"1 1\",\"pages\":\"211-214\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 International Semiconductor Conference (CAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMICND.2014.6966438\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Semiconductor Conference (CAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMICND.2014.6966438","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

在本文中，我们提出了一种双电压混合NEMS-CMOS方案来降低动态功耗。该方案使用较小的输入/输出电压来传播信息，并使用较大的电压来驱动(控制)NEMS。CMOS放大器用于连接这两个电压。具有大(r)个数输入的门性能更好，这与最优NEMS电路拓扑相匹配。对4输入布尔函数的模拟表明，功耗降低可以是显著的。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A dual-voltage hybrid NEMS-CMOS low-power scheme

In this paper we propose a dual-voltage hybrid NEMS-CMOS scheme to reduce dynamic power consumption. The scheme uses a smaller input/output voltage to propagate information, and a larger voltage to drive (control) the NEMS. CMOS amplifiers are used to interface these two voltages. Gates with a large(r) number of inputs perform better, which matches the optimal NEMS circuit topology. Simulations for a 4-input Boolean function show that power reductions can be significant.

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来源期刊

2014 International Semiconductor Conference (CAS)

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