J. Steensgaard, R. Reay, Raymond T. Perry, Dave Thomas, Geoffrey Tu, G. Reitsma
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A 24b 2MS/s SAR ADC with 0.03ppm INL and 106.3dB DR in 180nm CMOS
This work aims at optimizing accuracy, noise, and power for low-to-medium speed applications. The ADC function accommodates a wide range of use, including Nyquist-rate data acquisition and oversampled signal applications. The noise spectral density (NSD) is uniform from 0Hz to $\mathsf{Fs}/2=1 \mathsf{MHz}$, and hence $\mathsf{FoM}1= \mathsf{DR} +10\cdot \log$ (BW/Power) is the same for any BW selected by decimation filtering or other DSP. The SNDR is within 1 dB of the DR for full-scale input tones at frequencies up to 100kHz, and hence $\mathsf{FoM}2= \mathsf{SNDR} +10\cdot\mathsf{log}$ (BW/Power) is similar to FoM1 for the primary use cases.