FMECA处理器可测试性分析模块

Z. Bluvband, A. Barel
{"title":"FMECA处理器可测试性分析模块","authors":"Z. Bluvband, A. Barel","doi":"10.1109/RMCAE.1992.245504","DOIUrl":null,"url":null,"abstract":"Contemporary concurrent engineering increasingly uses multidisciplinary teams. This results in consideration of tasks related to product assurance requirements early in the design process. These requirements usually include quality assurance, reliability, maintainability and ILS. One of the most powerful tools for these design activities is Failure Mode Effects and Criticality Analysis (FMECA). The authors discuss the integration of testability analysis tasks into FMECA. Reliability data used for FMECA, may be also useful for qualitative and quantitative testability analysis. These data include: product tree (hardware or functional), failure modes, item failure rates, failure mode ratio, detection method. Defining all these data requires considerable effort by the engineer performing FMECA. Even if a computerized tool (FMECA processor) is used to reduce the time required for data entry processing, the engineer must still invest considerable time in constructive thinking. Thus, a program for testability analysis, able to utilize available data from FMECA processor files, is desirable. With the addition of a relatively small amount of data, the program would be able to perform all the main tasks of testability analysis, including BIT coverage analysis, fault isolation resolution analysis. Basic principles and ideas involved in building such a testability analysis module (TAM) are discussed.<<ETX>>","PeriodicalId":59272,"journal":{"name":"计算机辅助工程","volume":"68 1","pages":"109-116"},"PeriodicalIF":0.0000,"publicationDate":"1992-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Testability analysis module of FMECA processor\",\"authors\":\"Z. Bluvband, A. Barel\",\"doi\":\"10.1109/RMCAE.1992.245504\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Contemporary concurrent engineering increasingly uses multidisciplinary teams. This results in consideration of tasks related to product assurance requirements early in the design process. These requirements usually include quality assurance, reliability, maintainability and ILS. One of the most powerful tools for these design activities is Failure Mode Effects and Criticality Analysis (FMECA). The authors discuss the integration of testability analysis tasks into FMECA. Reliability data used for FMECA, may be also useful for qualitative and quantitative testability analysis. These data include: product tree (hardware or functional), failure modes, item failure rates, failure mode ratio, detection method. Defining all these data requires considerable effort by the engineer performing FMECA. Even if a computerized tool (FMECA processor) is used to reduce the time required for data entry processing, the engineer must still invest considerable time in constructive thinking. Thus, a program for testability analysis, able to utilize available data from FMECA processor files, is desirable. With the addition of a relatively small amount of data, the program would be able to perform all the main tasks of testability analysis, including BIT coverage analysis, fault isolation resolution analysis. Basic principles and ideas involved in building such a testability analysis module (TAM) are discussed.<<ETX>>\",\"PeriodicalId\":59272,\"journal\":{\"name\":\"计算机辅助工程\",\"volume\":\"68 1\",\"pages\":\"109-116\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"计算机辅助工程\",\"FirstCategoryId\":\"1087\",\"ListUrlMain\":\"https://doi.org/10.1109/RMCAE.1992.245504\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"计算机辅助工程","FirstCategoryId":"1087","ListUrlMain":"https://doi.org/10.1109/RMCAE.1992.245504","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

当代并行工程越来越多地使用多学科团队。这导致在设计过程的早期考虑与产品保证需求相关的任务。这些要求通常包括质量保证、可靠性、可维护性和ILS。这些设计活动中最强大的工具之一是失效模式效应和临界性分析(FMECA)。作者讨论了可测试性分析任务在FMECA中的集成。可靠性数据用于FMECA,也可用于定性和定量可测试性分析。这些数据包括:产品树(硬件或功能)、失效模式、项目故障率、失效模式比、检测方法。定义所有这些数据需要执行FMECA的工程师付出相当大的努力。即使使用计算机化工具(FMECA处理器)来减少数据输入处理所需的时间,工程师仍然必须投入相当多的时间进行建设性思考。因此,一个程序的可测试性分析,能够利用从FMECA处理器文件的可用数据,是可取的。通过添加相对少量的数据,该程序将能够执行所有主要的可测试性分析任务,包括BIT覆盖分析,故障隔离解决分析。讨论了构建这种可测试性分析模块(TAM)所涉及的基本原理和思想
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Testability analysis module of FMECA processor
Contemporary concurrent engineering increasingly uses multidisciplinary teams. This results in consideration of tasks related to product assurance requirements early in the design process. These requirements usually include quality assurance, reliability, maintainability and ILS. One of the most powerful tools for these design activities is Failure Mode Effects and Criticality Analysis (FMECA). The authors discuss the integration of testability analysis tasks into FMECA. Reliability data used for FMECA, may be also useful for qualitative and quantitative testability analysis. These data include: product tree (hardware or functional), failure modes, item failure rates, failure mode ratio, detection method. Defining all these data requires considerable effort by the engineer performing FMECA. Even if a computerized tool (FMECA processor) is used to reduce the time required for data entry processing, the engineer must still invest considerable time in constructive thinking. Thus, a program for testability analysis, able to utilize available data from FMECA processor files, is desirable. With the addition of a relatively small amount of data, the program would be able to perform all the main tasks of testability analysis, including BIT coverage analysis, fault isolation resolution analysis. Basic principles and ideas involved in building such a testability analysis module (TAM) are discussed.<>
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
2892
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信