P. Harpe, Cui Zhou, Xiaoyang Wang, G. Dolmans, H. D. Groot
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A 30fJ/conversion-step 8b 0-to-10MS/s asynchronous SAR ADC in 90nm CMOS
Applications like wireless sensor nodes require ultra low-power receivers with power-efficient ADCs. Moreover, the power-efficiency should be maintained for a wide range of sampling rates to enable system-level flexibility. Previously, the use of SAR ADCs has been proposed for low-power applications [1], [2]. This work describes the implementation of an 8bit asynchronous SAR ADC that achieves a 30fJ/Conversion-step power-efficiency for sampling rates between 10kS/s and 10MS/s.
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