公司:公平和高性能的内存控制持久内存系统

Jishen Zhao, O. Mutlu, Yuan Xie
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引用次数: 110

摘要

字节可寻址非易失性存储器承诺了一种新技术——持久存储器,它结合了传统主存储器(字节可寻址和快速接口)和传统存储器(数据持久性)的理想属性。为了支持数据持久化,持久内存系统需要复杂的数据复制和写请求的排序控制。因此,操作持久性内存的应用程序(持久性应用程序)具有与传统(非持久性)应用程序非常不同的内存访问特征,如本文所示。持久应用程序将繁重的写流量引入内存通道上的连续内存区域,而内存通道不能并发地处理读和写请求,导致由于银行级并行性低、频繁的写队列耗尽以及读写之间频繁的总线周转而导致内存带宽利用率不足。这些特征破坏了为非持久性应用程序设计的传统内存调度方案所提供的高性能和公平性。我们在本文中的目标是为运行持久和非持久应用程序的基于持久内存的系统设计一个公平和高性能的内存控制方案。我们的建议,坚定,包括三个关键的想法。首先,FIRM将请求源分类为非密集、流、随机和持久,并为每个源形成请求批次。其次,FIRM跨多个银行推进持久内存更新,从而提高银行级别的并行性,从而提高持久内存访问的内存带宽利用率。第三,FIRM以最小化总线周转和写队列消耗的方式调度来自不同来源的读和写请求批。我们的详细评估表明,与之前的五种内存调度器设计相比,FIRM提供了更高的系统性能和公平性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
FIRM: Fair and High-Performance Memory Control for Persistent Memory Systems
Byte-addressable nonvolatile memories promise a new technology, persistent memory, which incorporates desirable attributes from both traditional main memory (byte-addressability and fast interface) and traditional storage (data persistence). To support data persistence, a persistent memory system requires sophisticated data duplication and ordering control for write requests. As a result, applications that manipulate persistent memory (persistent applications) have very different memory access characteristics than traditional (non-persistent) applications, as shown in this paper. Persistent applications introduce heavy write traffic to contiguous memory regions at a memory channel, which cannot concurrently service read and write requests, leading to memory bandwidth underutilization due to low bank-level parallelism, frequent write queue drains, and frequent bus turnarounds between reads and writes. These characteristics undermine the high-performance and fairness offered by conventional memory scheduling schemes designed for non-persistent applications. Our goal in this paper is to design a fair and high-performance memory control scheme for a persistent memory based system that runs both persistent and non-persistent applications. Our proposal, FIRM, consists of three key ideas. First, FIRM categorizes request sources as non-intensive, streaming, random and persistent, and forms batches of requests for each source. Second, FIRM strides persistent memory updates across multiple banks, thereby improving bank-level parallelism and hence memory bandwidth utilization of persistent memory accesses. Third, FIRM schedules read and write request batches from different sources in a manner that minimizes bus turnarounds and write queue drains. Our detailed evaluations show that, compared to five previous memory scheduler designs, FIRM provides significantly higher system performance and fairness.
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