成本-半径平衡生成/斯坦纳树

H. Mitsubayashi, A. Takahashi, Y. Kajitani
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引用次数: 11

摘要

降低高速VLSI性能的最关键因素是路由树中的信号传播延迟。它是由源到汇路径长度和总长度相加估计的。为了设计一棵两者平衡小的路由树,我们提出了一种构造生成树的算法,该算法采用最小路径树和最短路径树算法的混合方式构造生成树。这个思想被推广到寻找这样一个线性的斯坦纳树。实验证明了源到汇的路径长度和总长度是平衡的和小的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Cost-radius balanced spanning/Steiner trees
The most crucial factor that degrades a high speed VLSI is the signal propagation delay in a routing tree. It is estimated additively by the amount of the source-to-sink path length and total length. To design a routing tree in which these two are balancingly small, we propose an algorithm to construct a spanning tree, by which a tree is constructed in a hybrid way of the Minimum-Tree and Shortest-Path Tree algorithms. The idea is extended to finding such a rectilinear Steiner tree. Experiments are given to show how the source-to-sink path length and total length are balanced and small.
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