{"title":"一种用于随机模拟的紧凑且节能的噪声发生器","authors":"Haixiang Zhao, R. Sarpeshkar, S. Mandal","doi":"10.1109/MWSCAS47672.2021.9531704","DOIUrl":null,"url":null,"abstract":"This paper describes an adaptive noise generator circuit suitable for on-chip simulations of stochastic chemical kinetics. The circuit uses amplified BJT white noise and adaptive low-pass filtering to emulate the power spectrum and auto-correlation of random telegraph signals (RTS) with Poisson-distributed level transitions. A current-mode implementation in the IHP 0.25 µm BiCMOS process shows excellent agreement with theoretical results from the Gillespie stochastic simulation algorithm over a 60 dB range in mean current levels (modeling molecule count numbers). The circuit has an estimated layout area of 0.01 mm2 and typically consumes 100 µA, which are 10× and 8× better, respectively, than prior implementations.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"212 1","pages":"806-811"},"PeriodicalIF":0.0000,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A Compact and Power-Efficient Noise Generator for Stochastic Simulations\",\"authors\":\"Haixiang Zhao, R. Sarpeshkar, S. Mandal\",\"doi\":\"10.1109/MWSCAS47672.2021.9531704\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes an adaptive noise generator circuit suitable for on-chip simulations of stochastic chemical kinetics. The circuit uses amplified BJT white noise and adaptive low-pass filtering to emulate the power spectrum and auto-correlation of random telegraph signals (RTS) with Poisson-distributed level transitions. A current-mode implementation in the IHP 0.25 µm BiCMOS process shows excellent agreement with theoretical results from the Gillespie stochastic simulation algorithm over a 60 dB range in mean current levels (modeling molecule count numbers). The circuit has an estimated layout area of 0.01 mm2 and typically consumes 100 µA, which are 10× and 8× better, respectively, than prior implementations.\",\"PeriodicalId\":6792,\"journal\":{\"name\":\"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"volume\":\"212 1\",\"pages\":\"806-811\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-08-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS47672.2021.9531704\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS47672.2021.9531704","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Compact and Power-Efficient Noise Generator for Stochastic Simulations
This paper describes an adaptive noise generator circuit suitable for on-chip simulations of stochastic chemical kinetics. The circuit uses amplified BJT white noise and adaptive low-pass filtering to emulate the power spectrum and auto-correlation of random telegraph signals (RTS) with Poisson-distributed level transitions. A current-mode implementation in the IHP 0.25 µm BiCMOS process shows excellent agreement with theoretical results from the Gillespie stochastic simulation algorithm over a 60 dB range in mean current levels (modeling molecule count numbers). The circuit has an estimated layout area of 0.01 mm2 and typically consumes 100 µA, which are 10× and 8× better, respectively, than prior implementations.