高k栅极介电介质纳米级FinFET中ses的分析

2010 Silicon Nanoelectronics Workshop Pub Date : 2010-06-13 DOI:10.1109/SNW.2010.5562569

Qian Xie, Jun Xu

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引用次数: 2

摘要

本文推导了纳米SOI三栅极场效应管(SOI- finfet)尺度长度的三维解析模型，并讨论了其意义。这项工作考虑到鳍(通道)和栅极绝缘体之间介电常数的差异，因此允许该模型准确地分析具有高k栅极介电介质的纳米级FinFET中的ses。在此基础上，分析了几何尺寸和材料对纳米级FinFET中ses的影响。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Analysis of SCEs in nanoscale FinFET with high-k gate dielectric

We derive a three-dimensional (3-D) analytical model of scale length for nanoscale SOI tri-gate FET (SOI-FinFET) and discuss its significance. This work takes into account the difference in permittivity between the fin (channel) and the gate insulator, and thus permits this model accurate for the analysis of SCEs in nanoscale FinFET with high-k gate dielectric. Based on the theory, we analyze the effects of geometrical dimensions and materials on the SCEs in nanoscale FinFET.

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2010 Silicon Nanoelectronics Workshop

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