{"title":"采用不同PWM技术减少开关数量的三相11电平逆变器的性能","authors":"R. Nair, R. Mahalakshmi, Sindhu Thampatty K C","doi":"10.1109/TAPENERGY.2015.7229648","DOIUrl":null,"url":null,"abstract":"As compared to conventional inverter topologies like diode clamped and capacitor clamped inverters, the cascaded multilevel inverter has lesser harmonics as well as lower switching stress. The cascaded topology has more number of power switches leading to greater heat losses, larger size, higher cost and more gate drive circuitry. The proposed configuration contains less number of switches and produces lesser harmonics in the output voltage than the cascaded topology. A comparison between four different types of pulse width modulation (PWM) techniques, namely, In-phase disposition (IPD), Anti-phase disposition (APD), Carrier Overlap (CO) and Variable Frequency (VF) PWM methods, has been done. The results have been verified through simulation study in MATLAB/Simulink in order to select the best PWM method that provides minimum THD in the output voltage. An LC filter has been designed to improve the harmonic profile.","PeriodicalId":6552,"journal":{"name":"2015 International Conference on Technological Advancements in Power and Energy (TAP Energy)","volume":"45 1","pages":"375-380"},"PeriodicalIF":0.0000,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"Performance of three phase 11-level inverter with reduced number of switches using different PWM techniques\",\"authors\":\"R. Nair, R. Mahalakshmi, Sindhu Thampatty K C\",\"doi\":\"10.1109/TAPENERGY.2015.7229648\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As compared to conventional inverter topologies like diode clamped and capacitor clamped inverters, the cascaded multilevel inverter has lesser harmonics as well as lower switching stress. The cascaded topology has more number of power switches leading to greater heat losses, larger size, higher cost and more gate drive circuitry. The proposed configuration contains less number of switches and produces lesser harmonics in the output voltage than the cascaded topology. A comparison between four different types of pulse width modulation (PWM) techniques, namely, In-phase disposition (IPD), Anti-phase disposition (APD), Carrier Overlap (CO) and Variable Frequency (VF) PWM methods, has been done. The results have been verified through simulation study in MATLAB/Simulink in order to select the best PWM method that provides minimum THD in the output voltage. An LC filter has been designed to improve the harmonic profile.\",\"PeriodicalId\":6552,\"journal\":{\"name\":\"2015 International Conference on Technological Advancements in Power and Energy (TAP Energy)\",\"volume\":\"45 1\",\"pages\":\"375-380\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 International Conference on Technological Advancements in Power and Energy (TAP Energy)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TAPENERGY.2015.7229648\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 International Conference on Technological Advancements in Power and Energy (TAP Energy)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TAPENERGY.2015.7229648","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Performance of three phase 11-level inverter with reduced number of switches using different PWM techniques
As compared to conventional inverter topologies like diode clamped and capacitor clamped inverters, the cascaded multilevel inverter has lesser harmonics as well as lower switching stress. The cascaded topology has more number of power switches leading to greater heat losses, larger size, higher cost and more gate drive circuitry. The proposed configuration contains less number of switches and produces lesser harmonics in the output voltage than the cascaded topology. A comparison between four different types of pulse width modulation (PWM) techniques, namely, In-phase disposition (IPD), Anti-phase disposition (APD), Carrier Overlap (CO) and Variable Frequency (VF) PWM methods, has been done. The results have been verified through simulation study in MATLAB/Simulink in order to select the best PWM method that provides minimum THD in the output voltage. An LC filter has been designed to improve the harmonic profile.
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