基于C5工艺的深亚微米CMOS 8位算术与逻辑电路衬垫框架的设计、布局与仿真

P. Rai, Shivoy Srivastava, Ayoush Johri
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引用次数: 1

摘要

微处理器的关键部件,是中央处理器的核心部件。算术和逻辑电路包括实现“与”和“或”等逻辑运算的组合逻辑,以及“加”、“减”、“乘”等算术运算。本文设计了一个8位算术逻辑电路,并利用电子CAD和SPICE软件进行了仿真。所提出的设计是一个8位算术和逻辑电路,可以执行:A and B, A OR B, A + B(加法)和A - B(减法)以及所有可能的算术和逻辑运算。各子模块的物理设计采用C5工艺300nm工艺技术。设计pad帧,并对其进行后续的“设计规则检查”和“网络一致性检查”。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design, Layout and Simulation of 8 bit Arithmetic and Logic Circuits Pad frame using C5 Process for deep submicron CMOS
A critical component of the microprocessor, the core component of central processing unit. Arithmetic and logic circuits comprises the combinational logic that implements logic operations such as AND and OR, and arithmetic operations such as Addition, Subtraction, and Multiplication. In this presented work, an 8-bit arithmetic logic circuit is designed, implemented and simulated using the Electric CAD and SPICE software. The proposed design is an 8-bit arithmetic and logic circuit that can perform: A AND B, A OR B, A + B (addition), and A - B (subtraction) and all possible arithmetic and Logical operations. Physical design of every sub module is carried out using C5 process 300 nm process technology. A pad frame is also designed and subsequent Design Rule Checks and network consistency checks are performed on the same.
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