Investigation of Temperature Variation on a HSO Ferroelectric FDSOI NCFET

In this work, temperature effect on MFMIS type FDSOI NCFET is investigated considering a well known thin film ferroelectric material HSO (Silicon doped HfO2). The current investigations are performed in a TCAD environment where the underlying gate charge is obtained using TCAD simulation to computing ferro voltage across the HSO ferroelectric capacitor to find the total gate voltage in the gate-stack. The extracted values are then investigated for a non-hysteric operation while varying ferroelectric thickness $(\mathrm{T}_{F})$ to predict the optimum $\mathrm{T}_{F}$ of HSO ferroelectric. The optimum HSO type MFMIS NCFET has been subjected to variation in temperature to predict the electrical performance of the device under harsh environments. It is observed that the HSO type MFMIS NCFET predicts improvement in sub-threshold slope (SS) and amplification factor $(\mathrm{A}_{V})$ at operating temperatures reduced significantly lower than the ferroelectric Curie temperature whereas the device tends to show slight deterioration in SS and $\mathrm{A}_{V}$ when the operating temperature approaches the Curie temperature.