低压长溅射法制备高速逻辑LSI用铜线:超高速大规模集成硅器件用铜互连材料相关问题专刊

T. Saito, T. Hashimoto, N. Ohashi, T. Fujiwara, H. Yamaguchi
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引用次数: 3

摘要

研究了铜溅射制备高性能逻辑大规模集成电路的方法。靶材与衬底距离的延长可以有效地提高溅射膜的台阶覆盖率,同时降低操作压力。低压长溅射法的步长覆盖范围也很大程度上取决于硅片上形成的沟槽和孔的特征尺寸。采用该溅射工艺和再流动退火工艺成功地填充了亚微米孔洞和沟槽。研究了在孔孔溅射沉积之前的氢退火工艺,以实现通过孔的良好导电性。这一过程导致铜膜表面氧化铜的减少。利用这些新工艺,成功地制作了具有4级铜互连的0.2μm节点BiCMOS LSI,并充分证明了铜互连系统的高性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Copper wires for high speed logic LSI prepared by low pressure long throw sputtering method : Special issue on materials-related issues for Cu interconnects used in ultra high speed large scaled integrated Si devices
Copper sputtering method for fabrication of high performance logic LSI was studied. Extension of target to substrate distance is effective to improve step coverage of sputtered film combined with reduced operation pressure. Step coverage of low pressure long throw sputtering method also strongly depends upon the feature size of trenches and holes which are formed on silicon wafer. Sub-micron holes and trenches are successfully filled with copper by using this sputtering process followed by re-flow annealing process. Hydrogen annealing process prior to the sputtering deposition on via openings is also investigated to realize good conductivity through the via. This process results in the reduction of copper oxide at the surface of copper film. Using these newly developed processes, 0.2μm node BiCMOS LSI with 4 level copper interconnects was successfully fabricated and high performance of the copper interconnect system was clearly demonstrated.
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