{"title":"采用增强型噪声型DEM架构的多位/spl Delta//spl Sigma/ CMOS DAC","authors":"D. Akselrod, S. Greenberg, S. Hava","doi":"10.1109/ICECS.2004.1399628","DOIUrl":null,"url":null,"abstract":"A multibit delta-sigma (/spl Delta//spl Sigma/) DAC employing enhanced noise-shaped dynamic element matching (DEM) architecture is presented. The architecture for implementing a noise-shaped DEM algorithm for use in multibit delta-sigma (/spl Delta//spl Sigma/) converters is analyzed. The suggested architecture shows the performance improvement as compared to previous solutions. System operation is discussed and hardware realization of the proposed architecture is described. A five-level /spl Delta//spl Sigma/ digital-to-analog (D/A) converter incorporating the proposed DEM architecture has been fabricated in a 0.12-/spl mu/m single-poly CMOS process. Finally, measured results are presented.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Multibit /spl Delta//spl Sigma/ CMOS DAC employing enhanced noise-shaped DEM architecture\",\"authors\":\"D. Akselrod, S. Greenberg, S. Hava\",\"doi\":\"10.1109/ICECS.2004.1399628\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A multibit delta-sigma (/spl Delta//spl Sigma/) DAC employing enhanced noise-shaped dynamic element matching (DEM) architecture is presented. The architecture for implementing a noise-shaped DEM algorithm for use in multibit delta-sigma (/spl Delta//spl Sigma/) converters is analyzed. The suggested architecture shows the performance improvement as compared to previous solutions. System operation is discussed and hardware realization of the proposed architecture is described. A five-level /spl Delta//spl Sigma/ digital-to-analog (D/A) converter incorporating the proposed DEM architecture has been fabricated in a 0.12-/spl mu/m single-poly CMOS process. Finally, measured results are presented.\",\"PeriodicalId\":38467,\"journal\":{\"name\":\"Giornale di Storia Costituzionale\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-12-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Giornale di Storia Costituzionale\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.2004.1399628\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"Arts and Humanities\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Giornale di Storia Costituzionale","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2004.1399628","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"Arts and Humanities","Score":null,"Total":0}
A multibit delta-sigma (/spl Delta//spl Sigma/) DAC employing enhanced noise-shaped dynamic element matching (DEM) architecture is presented. The architecture for implementing a noise-shaped DEM algorithm for use in multibit delta-sigma (/spl Delta//spl Sigma/) converters is analyzed. The suggested architecture shows the performance improvement as compared to previous solutions. System operation is discussed and hardware realization of the proposed architecture is described. A five-level /spl Delta//spl Sigma/ digital-to-analog (D/A) converter incorporating the proposed DEM architecture has been fabricated in a 0.12-/spl mu/m single-poly CMOS process. Finally, measured results are presented.
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