{"title":"第15部分概述:射频锁相环:射频小组委员会","authors":"Jiayoon Ru, Jaehyouk Choi, P. Wambacq","doi":"10.1109/ISSCC.2018.8310275","DOIUrl":null,"url":null,"abstract":"This session presents the latest advances in digital and analog PLLs generating frequencies from 1 to 100GHz and covering diverse topics, such as ultra-low-power ADPLLs, FMCW synthesizers, fast-settling bang-bang PLLs, interference-coupling mitigation, type-I sampling PLLs, and mm-wave ADPLLs.","PeriodicalId":6511,"journal":{"name":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","volume":"33 1","pages":"244-245"},"PeriodicalIF":0.0000,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Session 15 overview: RF PLLs: RF subcommittee\",\"authors\":\"Jiayoon Ru, Jaehyouk Choi, P. Wambacq\",\"doi\":\"10.1109/ISSCC.2018.8310275\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This session presents the latest advances in digital and analog PLLs generating frequencies from 1 to 100GHz and covering diverse topics, such as ultra-low-power ADPLLs, FMCW synthesizers, fast-settling bang-bang PLLs, interference-coupling mitigation, type-I sampling PLLs, and mm-wave ADPLLs.\",\"PeriodicalId\":6511,\"journal\":{\"name\":\"2016 IEEE International Solid-State Circuits Conference (ISSCC)\",\"volume\":\"33 1\",\"pages\":\"244-245\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE International Solid-State Circuits Conference (ISSCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2018.8310275\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2018.8310275","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This session presents the latest advances in digital and analog PLLs generating frequencies from 1 to 100GHz and covering diverse topics, such as ultra-low-power ADPLLs, FMCW synthesizers, fast-settling bang-bang PLLs, interference-coupling mitigation, type-I sampling PLLs, and mm-wave ADPLLs.
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