耗尽模式MOS电容建模研究

2017 China Semiconductor Technology International Conference (CSTIC) Pub Date : 2017-03-01 DOI:10.1109/CSTIC.2017.7919748

C. Tseng, Yuan Sheng Wang

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引用次数: 0

摘要

提出了一种高精度、可行性高的耗尽模式MOS (DMOS)电容建模方法。目前，缺乏与DMOS电容相关的紧凑模型建模，但它在CMOS图像传感器电路的A/D转换器(adc)中具有重要意义。这种建模方法不仅可以提供良好的几何缩放精度，而且具有电压和温度敏感性。

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Depletion-mode MOS capacitor modeling investigation

A depletion-mode MOS (DMOS) capacitor modeling methodology with high accuracy and feasibility is proposed. Currently, it is lack of compact model relevant DMOS capacitor modeling but it is significant importance in A/D converters (ADCs) for CMOS image sensor circuit. This modeling methodology not only could provide good accuracy on geometry scaling but also with voltage and temperature sensitivity.

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2017 China Semiconductor Technology International Conference (CSTIC)

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