Specification and development of an equalizer-demodulator for wideband digital microwave radio signals

The authors describe the specification and implementation of a sophisticated digital signal processor to be used for equalizing and demodulating high-rate, high-order quadrature-amplitude-modulated (QAM) signals used in digital radio systems. The processor uses state-of-the-art algorithms as well as the latest high-speed CMOS VLSI technology to achieve a processing rate in excess of 10 gigamultiply/adds per second. The system exhibits several unique features; in particular, 40 Mband signals can be processed with 64-tap equalizer and the functions of baud and carrier recovery are implemented digitally. The signal processing problems to be solved are described, and from them a set of requirements is developed. A summary of the algorithms needed to recover symbol timing, equalize the incoming signals, and remove carrier offset is provided. A brief discussion of the hardware tradeoffs is followed by a detailed description of the system design.<>