{"title":"一个0.003 mm2 5.2 mW/抽头20gbd无电感5抽头模拟RX-FFE","authors":"Ryan Boesch, Kevin Zheng, B. Murmann","doi":"10.1109/VLSIC.2016.7573522","DOIUrl":null,"url":null,"abstract":"A 0.003 mm2 5.2 mW/tap analog receive-side feedforward equalizer (RX-FFE) is demonstrated in 40 nm CMOS for up to 20 GBd ADC-based links. The FFE is constructed entirely with analog-inverter transconductors and capacitors, avoiding the use of area-intensive inductors. The delay element is implemented as a first-order Padé approximant of an ideal delay. The equalization performance is measured to be sufficient to relax the ADC resolution requirement by 1 bit. The total power consumed is less than 26 mW with less than 9.2 nV/√Hz output noise for all configurations.","PeriodicalId":6512,"journal":{"name":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","volume":"9 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"A 0.003 mm2 5.2 mW/tap 20 GBd inductor-less 5-tap analog RX-FFE\",\"authors\":\"Ryan Boesch, Kevin Zheng, B. Murmann\",\"doi\":\"10.1109/VLSIC.2016.7573522\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 0.003 mm2 5.2 mW/tap analog receive-side feedforward equalizer (RX-FFE) is demonstrated in 40 nm CMOS for up to 20 GBd ADC-based links. The FFE is constructed entirely with analog-inverter transconductors and capacitors, avoiding the use of area-intensive inductors. The delay element is implemented as a first-order Padé approximant of an ideal delay. The equalization performance is measured to be sufficient to relax the ADC resolution requirement by 1 bit. The total power consumed is less than 26 mW with less than 9.2 nV/√Hz output noise for all configurations.\",\"PeriodicalId\":6512,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"volume\":\"9 1\",\"pages\":\"1-2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2016.7573522\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2016.7573522","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 0.003 mm2 5.2 mW/tap 20 GBd inductor-less 5-tap analog RX-FFE
A 0.003 mm2 5.2 mW/tap analog receive-side feedforward equalizer (RX-FFE) is demonstrated in 40 nm CMOS for up to 20 GBd ADC-based links. The FFE is constructed entirely with analog-inverter transconductors and capacitors, avoiding the use of area-intensive inductors. The delay element is implemented as a first-order Padé approximant of an ideal delay. The equalization performance is measured to be sufficient to relax the ADC resolution requirement by 1 bit. The total power consumed is less than 26 mW with less than 9.2 nV/√Hz output noise for all configurations.
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