用于段诊断的Fastbus显示模块

H Müller, D Burckhart
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引用次数: 1

摘要

运行和开发Fastbus网络需要诊断测试和验证工具。特别是,在线程序开发需要标准的目标模块和快速总线段在特定周期内实际总线状态的视觉反馈。提供这种功能的两个基本硬件单元是一个标准的Fastbus从站和一个可以直接连接到背板状态显示的周期锁存逻辑。因此,诊断应用程序有三个方面:单独使用测试从机或锁存逻辑,或将两者结合使用。结合使用允许通过锁存电路验证测试从周期,揭示所有Fastbus信号的相应总线模式。欧洲核子研究中心开发的快速总线显示模块(FDM)在一张卡上集成了快速总线从站和锁存器以及显示逻辑。fdm专用测试软件正在开发中。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Fastbus display module for segment diagnosis

Diagnostic test and verification tools are required to run and develop Fastbus networks. In particular, on-line program developments demand standard target modules and visual feedback of the actual bus status from a Fastbus segment during specific cycles. The two basic hardware units to provide this are a standard Fastbus slave and a cycle-latching logic which can be connected to a direct back-plane status display. The diagnostic applications are therefore threefold: the separate use of the test slave or of the latch logic, or a combined use of both of them. The combined use allows the verification of test slave cycles through the latch circuitry, revealing the corresponding bus pattern for all Fastbus signals. The Fastbus display module (FDM) developed at CERN integrates both the Fastbus slave and the latch and display logic on one card. FDM-specific test software is being developed.

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