使用门级ATPG的模块化测试生成和基于并行透明性的测试翻译

Y. Makris, A. Orailoglu, P. Vishakantaiah
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引用次数: 0

摘要

我们引入了模块化设计的分层测试生成方法,专门采用门级ATPG。基于模块化透明的概念,减小了设计的搜索空间,降低了门级测试生成的复杂性。虽然ATPG应用于整个电路,但每个模块的故障都是单独针对的,而周围的模块则被更简单的透明等效逻辑所取代。通过理论分析和一组实验数据证明,所提出的方法可以显著提高测试生成速度,同时保持与全电路门级ATPG相当的故障覆盖率和矢量计数。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Modular test generation and concurrent transparency-based test translation using gate-level ATPG
We introduce a hierarchical test generation methodology for modular designs, employing exclusively gate-level ATPG. Based on the notion of modular transparency, the search space of the design is reduced to alleviate the complexity of gate-level test generation. Although ATPG is applied at the full circuit, faults in each module are targeted individually, while the surrounding modules are replaced by their much simpler, transparency-equivalent logic. As analyzed theoretically and as demonstrated through a set of experimental data, the proposed methodology results in significant test generation speed-up, while preserving comparable fault coverage and vector count to full-circuit gate-level ATPG.
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