用于实时光子采样模数转换的线性化参数门

2011 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference Pub Date : 2011-03-06 DOI:10.1364/OFC.2011.OTHW5

A. Wiberg, E. Myslivets, R. Nissim, A. Danicic, D. Blessing, B. Kuo, S. Radic

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引用次数: 6

摘要

构造了一个线性化参数采样门，探讨其在模数转换(ADC)架构中的性能限制。采样门的线性响应在高分辨率和高速率ADC中均可实现。

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Linearized parametric gate for real-time photonic-sampled analog-to-digital conversion

A linearized parametric sampling gate was constructed to explore its performance limits in an analog-to-digital conversion (ADC) architecture. Linear response of the sampling gate can be achieved both in high-resolution and high-rate ADC.

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2011 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference

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