基于多目标差分进化算法的电压基准电路和环形振荡器电路优化设计

S. K. Dash, B. P. De, P. Samanta, B. Appasani, R. Kar, D. Mandal, N. Bizon
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摘要

本文讨论了不同VLSI电路的优化设计,即CMOS电压基准电路和CMOS环形振荡器(RO)。这里使用的优化技术是多目标差分进化算法(MDEA)。所有电路都是为90nm技术设计的。CMOS电压参考电路的主要目的是使输出端的电压变化最小。参考电压的目标值为550mv。根据功耗和相位噪声等性能参数,设计了CMOS环形振荡器(RO)。利用MDEA得到了各电路的最佳晶体管尺寸。每个电路都在SPICE中实现,采用最优的晶体管尺寸,并获得性能参数。所设计的电压基准电路可实现550mv的基准电压,功耗为600nw。由于温度从- 40°C到+ 125°C的变化,观察到参考电压变化8.18%。基于mdea优化设计的RO振荡频率为2.001 GHz,在1 MHz偏置频率下相位噪声为- 87 dBc/Hz,功耗为71 μW。本文的主要目的是利用MDEA优化MOS晶体管的尺寸,以获得更好的电路性能参数。采用MOS晶体管尺寸的最优值进行SPICE仿真,以显示电路的性能参数。仿真结果表明,该系统基本满足设计要求。SPICE结果表明,MDEA是上述VLSI电路优化设计的一种较好的技术。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Optimal Design of Voltage Reference Circuit and Ring Oscillator Circuit Using Multiobjective Differential Evolution Algorithm
This paper deals with the optimal design of different VLSI circuits, namely, the CMOS voltage reference circuit and the CMOS ring oscillator (RO). The optimization technique used here is the multiobjective differential evolution algorithm (MDEA). All the circuits are designed for 90 nm technology. The main objective of the CMOS voltage reference circuit is to minimize the voltage variation at the output. The targeted value of the reference voltage is 550 mV. A CMOS ring oscillator (RO) is designed depending on the performance parameters such as power consumption and phase noise. The optimal transistor sizing of each circuit is obtained from MDEA. Each circuit is implemented in SPICE by taking the optimal dimensions of the transistors, and the performance parameters are achieved. The designed voltage reference circuit achieves a reference voltage of 550 mV with 600 nW power dissipation. The reference voltage variation of 8.18% is observed due to temperature variation from −40°C to + 125°C. The MDEA-based optimal design of RO oscillates at 2.001 GHz frequency, has a phase noise of −87 dBc/Hz at 1 MHz offset frequency, and consumes 71 μW power. This work mainly aims to optimize the MOS transistors’ sizes using MDEA for better circuit performance parameters. SPICE simulation has been carried out by using the optimal values of MOS transistor sizes to exhibit the performance parameters of the circuit. Simulation results establish that design specifications are closely met. SPICE results show that MDEA is a better technique for the optimal design of the above-mentioned VLSI circuits.
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