节能的SOC电力输送使用完全集成的电压调节器与高频开关控制

B. Wu
{"title":"节能的SOC电力输送使用完全集成的电压调节器与高频开关控制","authors":"B. Wu","doi":"10.1109/CSTIC.2017.7919905","DOIUrl":null,"url":null,"abstract":"Intel® introduced an energy efficient SoC power delivery scheme utilizing fully-integrated high-frequency voltage regulators along the roadmap of Moore's law scaling. From 22nm process to 14nm or even 10nm, circuit blocks shrink and the embedded passives are scaled sequentially in the similar manner. A major challenge in the on-die VR design is to achieve sufficient integration and minimization of the required components, while still maintaining high power efficiency and multi-phase switching capability. This allows SoC to continue delivering a compelling power performance benefit to support the scaling process. In this paper, the optimized performance metrics of the silicon integrations are presented with measured implications and correlated simulations. The new generation microprocessor is demonstrated to be powered by a highly configurable VR solution of wide voltage and frequency range that facilitates potentially 50% more energy saving and peak available power increase.","PeriodicalId":6846,"journal":{"name":"2017 China Semiconductor Technology International Conference (CSTIC)","volume":"75 1","pages":"1-3"},"PeriodicalIF":0.0000,"publicationDate":"2017-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Energy efficient SOC power delivery using fully-integrated voltage regulators with high-frequency switch control\",\"authors\":\"B. Wu\",\"doi\":\"10.1109/CSTIC.2017.7919905\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Intel® introduced an energy efficient SoC power delivery scheme utilizing fully-integrated high-frequency voltage regulators along the roadmap of Moore's law scaling. From 22nm process to 14nm or even 10nm, circuit blocks shrink and the embedded passives are scaled sequentially in the similar manner. A major challenge in the on-die VR design is to achieve sufficient integration and minimization of the required components, while still maintaining high power efficiency and multi-phase switching capability. This allows SoC to continue delivering a compelling power performance benefit to support the scaling process. In this paper, the optimized performance metrics of the silicon integrations are presented with measured implications and correlated simulations. The new generation microprocessor is demonstrated to be powered by a highly configurable VR solution of wide voltage and frequency range that facilitates potentially 50% more energy saving and peak available power increase.\",\"PeriodicalId\":6846,\"journal\":{\"name\":\"2017 China Semiconductor Technology International Conference (CSTIC)\",\"volume\":\"75 1\",\"pages\":\"1-3\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 China Semiconductor Technology International Conference (CSTIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSTIC.2017.7919905\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 China Semiconductor Technology International Conference (CSTIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSTIC.2017.7919905","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

英特尔®推出了一种节能的SoC供电方案,利用完全集成的高频稳压器沿着摩尔定律缩放的路线图。从22nm工艺到14nm甚至10nm,电路块缩小,嵌入的无源以类似的方式顺序缩放。片上虚拟现实设计的一个主要挑战是实现所需组件的充分集成和最小化,同时仍然保持高功率效率和多相开关能力。这使得SoC能够继续提供令人信服的功率性能优势,以支持扩展过程。本文给出了优化后的硅集成电路的性能指标,并给出了测量结果和相关的仿真。新一代微处理器被证明由高度可配置的宽电压和频率范围的VR解决方案供电,可促进潜在的50%以上的节能和峰值可用功率增加。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Energy efficient SOC power delivery using fully-integrated voltage regulators with high-frequency switch control
Intel® introduced an energy efficient SoC power delivery scheme utilizing fully-integrated high-frequency voltage regulators along the roadmap of Moore's law scaling. From 22nm process to 14nm or even 10nm, circuit blocks shrink and the embedded passives are scaled sequentially in the similar manner. A major challenge in the on-die VR design is to achieve sufficient integration and minimization of the required components, while still maintaining high power efficiency and multi-phase switching capability. This allows SoC to continue delivering a compelling power performance benefit to support the scaling process. In this paper, the optimized performance metrics of the silicon integrations are presented with measured implications and correlated simulations. The new generation microprocessor is demonstrated to be powered by a highly configurable VR solution of wide voltage and frequency range that facilitates potentially 50% more energy saving and peak available power increase.
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