利用SIMT体系结构中的值结构的微体系结构机制

J. Kim, Christopher Torng, S. Srinath, Derek Lockhart, C. Batten
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引用次数: 33

摘要

SIMT架构通过利用跨数据并行线程的控制和内存访问结构来提高性能和效率。当多个线程对可以紧凑编码的值进行操作时,例如,通过使用线程索引的简单函数,就会出现值结构。我们描述了典型内核中控制、内存访问和值结构的可用性,并观察了当前SIMT体系结构在很大程度上忽略的大量值结构。我们提出了三种微架构机制来利用基于算术、分支和内存指令的紧凑型仿射执行的值结构。我们在传统SIMT微架构(GP-SIMT)和细粒度SIMT微架构(FG-SIMT)的背景下探讨了这些机制,这些架构存在于通用图形处理单元和细粒度SIMT微架构(FG-SIMT)中,后者是适用于以计算为中心的数据并行加速器的SIMT变体。使用现代GP-SIMT系统的周期级建模和八通道FG-SIMT执行引擎的VLSI实现来评估一系列应用内核。与没有紧凑仿射执行的基线相比,我们的方法可以将GP-SIMT循环级性能提高4-17%,将FG-SIMT绝对性能提高20-65%,并将大多数内核的能源效率提高30%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Microarchitectural mechanisms to exploit value structure in SIMT architectures
SIMT architectures improve performance and efficiency by exploiting control and memory-access structure across data-parallel threads. Value structure occurs when multiple threads operate on values that can be compactly encoded, e.g., by using a simple function of the thread index. We characterize the availability of control, memory-access, and value structure in typical kernels and observe ample amounts of value structure that is largely ignored by current SIMT architectures. We propose three microarchitectural mechanisms to exploit value structure based on compact affine execution of arithmetic, branch, and memory instructions. We explore these mechanisms within the context of traditional SIMT microarchitectures (GP-SIMT), found in general-purpose graphics processing units, as well as fine-grain SIMT microarchitectures (FG-SIMT), a SIMT variant appropriate for compute-focused data-parallel accelerators. Cycle-level modeling of a modern GP-SIMT system and a VLSI implementation of an eight-lane FG-SIMT execution engine are used to evaluate a range of application kernels. When compared to a baseline without compact affine execution, our approach can improve GP-SIMT cycle-level performance by 4-17% and can improve FG-SIMT absolute performance by 20-65% and energy efficiency up to 30% for a majority of the kernels.
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