10mhz 14.3W/mm2 DAB迟滞控制功率转换器,实现2.5W/247ns满负荷功率翻转,在99.9%的功率范围内实现80%以上的效率,用于5G物联网

Kang Wei, Bumkil Lee, D. Ma
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引用次数: 2

摘要

为满足5G物联网对纳秒级负载翻转和全功率范围高效率的要求,设计了一种双自适应边界(DAB)滞回控制功率变换器。在1A/3ns的负载升压/降压下,由于DAB控制,它达到了1% $\ mathm {t}_{settle}$的247ns/387ns。这比最优秀的CMOS $0.18 \mu \ mathm {m}$要快6倍。同步DCR偏移抵消方案将$V_{O}$调节精度提高了10倍。当功率从满负载扩展到超轻负载时,控制器自重新配置以消除冗余控制器损耗并促进自适应系统供电。它在2.5W全功率范围内达到99.9%的效率。高效率的设计使芯片的最高功率密度达到14.3W/mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 10-MHz 14.3W/mm2 DAB Hysteretic Control Power Converter Achieving 2.5W/247ns Full Load Power Flipping and above 80% Efficiency in 99.9% Power Range for 5G IoTs
A double adaptive bound (DAB) hysteretic control power converter is designed for 5G IoTs, which require nanosecond power load flipping and high efficiency across full power range. In response to 1A/3ns load step-up/step-down, it achieves 1% $\mathrm{t}_{settle}$ of 247ns/387ns, thanks to the DAB control. This is 6× faster than the best of the arts on $0.18 \mu \mathrm{m}$ CMOS. A synchronized DCR offset cancellation scheme improves $V_{O}$ regulation accuracy by 10×. As power scales from full to ultra-light load, the controller self-reconfigures to remove redundant controller loss and facilitate adaptive system power delivery. It achieves $\gt80$% efficiency over 99.9% of 2.5W full power range. Highly efficient design leads to the highest reported chip power density of 14.3W/mm2.
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