{"title":"Virtex-6和Spartan-6,再加上对未来的展望","authors":"P. Alfke","doi":"10.1109/FPL.2009.5272564","DOIUrl":null,"url":null,"abstract":"Recently, Xilinx introduced two new FPGA families, Virtex-6 and Spartan-6, closely related in architecture, but each optimized for different markets and applications: Virtex-6 for high performance, features and capacity; Spartan-6 for low cost and low power consumption. Both families take advantage of 40/45 nm technology, and both are derived from the successful Virtex-5 architecture. I will give an overview of the salient features and capabilities of both families. Then I will give a peek into the future, explaining the impact of rapidly rising development costs for all future technology nodes. That limits ASICs and ASSPs to serve only high-volume opportunities, and offers unique advantages for FPGAs. But we must overcome certain technical difficulties, and streamline the user's design process.","PeriodicalId":93570,"journal":{"name":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","volume":"153 1","pages":"5"},"PeriodicalIF":0.0000,"publicationDate":"2009-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Virtex-6 and Spartan-6, plus a look into the future\",\"authors\":\"P. Alfke\",\"doi\":\"10.1109/FPL.2009.5272564\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Recently, Xilinx introduced two new FPGA families, Virtex-6 and Spartan-6, closely related in architecture, but each optimized for different markets and applications: Virtex-6 for high performance, features and capacity; Spartan-6 for low cost and low power consumption. Both families take advantage of 40/45 nm technology, and both are derived from the successful Virtex-5 architecture. I will give an overview of the salient features and capabilities of both families. Then I will give a peek into the future, explaining the impact of rapidly rising development costs for all future technology nodes. That limits ASICs and ASSPs to serve only high-volume opportunities, and offers unique advantages for FPGAs. But we must overcome certain technical difficulties, and streamline the user's design process.\",\"PeriodicalId\":93570,\"journal\":{\"name\":\"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications\",\"volume\":\"153 1\",\"pages\":\"5\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-09-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FPL.2009.5272564\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Field-programmable Logic and Applications : [proceedings]. International Conference on Field-Programmable Logic and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FPL.2009.5272564","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Virtex-6 and Spartan-6, plus a look into the future
Recently, Xilinx introduced two new FPGA families, Virtex-6 and Spartan-6, closely related in architecture, but each optimized for different markets and applications: Virtex-6 for high performance, features and capacity; Spartan-6 for low cost and low power consumption. Both families take advantage of 40/45 nm technology, and both are derived from the successful Virtex-5 architecture. I will give an overview of the salient features and capabilities of both families. Then I will give a peek into the future, explaining the impact of rapidly rising development costs for all future technology nodes. That limits ASICs and ASSPs to serve only high-volume opportunities, and offers unique advantages for FPGAs. But we must overcome certain technical difficulties, and streamline the user's design process.