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引用次数: 5
摘要
参数失效已成为新产品成品率/可靠性损失的主要原因。在0.35 /spl mu/m和0.25 /spl mu/m进程上的微处理器显示出高水平的参数(软)故障。我们建议将集成产品参数和晶体管级参数的基本物理关系作为芯片/晶圆级系统工艺不稳定性的函数,引入参数化工艺到设计基线。与基线的偏差是由影响产量和可靠性的过程相关缺陷引起的。我们引入了一种新的多参数方法来计算这种偏差,并将参数系统缺陷与随机缺陷区分开来。对>700 K 0.25 /spl mu/m微处理器单元的分析表明,>16%的高偏差单元在老化(BI)中失败。对偏移材料的分析表明,单元亚组的产率与基线偏差有很强的关系。新方法使过程变异源对产品良率可靠性和性能的影响得以评估。
Multi parameter method for yield analysis and reliability assessment
Parametric failure is becoming the main reason of yield/reliability loss in new products. Microprocessors on 0.35 /spl mu/m and 0.25 /spl mu/m processes show a high level of parametric (soft) failure. We propose to introduce a parametric process-to-design baseline by using basic physical relations of integrated product parameters and transistor level parameters as a function of systematic process instabilities on the die/wafer level. The deviations from the baseline are caused by process-related defects that impact yield and reliability. We have introduced a new multi-parameter method in order to calculate this deviation and separate between parametric systematic defects and random defects. The analysis of >700 K 0.25 /spl mu/m microprocessor units showed that >16% of the units that have high deviation failed in burn-in (BI). The analysis of excursion material showed that the yield in subgroups of the units is a strong function of the deviation from the baseline. The new methodology enables the impact of process variation sources on product yield reliability and performance to be assessed.