用于杂散电平降低的新型频率合成器

Armin Choopani, Shahaboddin Ghajari, A. Safarian
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引用次数: 0

摘要

提出了一种降低杂散电平的新型频率合成器结构。通过使用前馈路径,在传递函数中产生一个新的零,这使我们能够增加与控制电压线相连的电容器,从而降低杂散电平。采用快速沉降技术补偿了减杂技术对沉降时间的影响。在MATLAB/Simulink中实现了频率合成器的各个模块。仿真结果表明,与传统结构相比,2.4 GHz频率合成器的参考杂散电平提高了13 dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Novel Frequency Synthesizer for Spur Level Reduction
A novel frequency synthesizer architecture for reducing spur level is presented. By using a feedforward path a new zero in the transfer function is generated which enables us to increase the capacitor tied to the control voltage line and thus reducing spur level. A fast settling technique is also used to compensate the effect of spur reduction technique on settling time. Different blocks of frequency synthesizer are implemented in MATLAB/Simulink. Simulations show 13 dB improvement in reference spur level compared to conventional architecture for a 2.4 GHz frequency synthesizer.
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