采用LMS-FIR和插值滤波器校准的14位200毫秒/秒时间交错ADC

2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI:10.1109/EDSSC.2011.6117569

Fan Ye, Peng Zhang, Bei Yu, Chixiao Chen, Y. Zhu, Junyan Ren

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引用次数: 4

摘要

提出了一种时间交错模数转换器的数字背景校正方法。利用LMS-FIR和插值滤波器对失调、增益、带宽和采样时间误差进行校正。通过相关性评估自适应控制，校准适用于大多数输入情况。采用0.18µm CMOS工艺设计了一个14位200毫秒/秒双通道时间交错ADC，其核心面积为15.2 mm2。校正后，该ADC的SFDR为88.9 dBc, SNDR为69.5 dBc，功耗为460 mW，电压为1.8 V。

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A 14-bit 200-MS/s time-interleaved ADC calibrated with LMS-FIR and interpolation filter

A digital background calibration for time-interleaved ADC is presented. By using LMS-FIR and interpolation filter, mismatches of offset, gain, bandwidth, and sample-time error are calibrated. Adaptively controlled by correlation evaluation, the calibration is applicable for most input cases. A 14-bit 200-MS/s two-channel time-interleaved ADC is prototyped in a 0.18-µm CMOS process with core area of 15.2 mm2. The ADC achieves an SFDR of 88.9 dBc and an SNDR of 69.5 dBc after calibration, consuming 460 mW at 1.8 V.

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2011 IEEE International Conference of Electron Devices and Solid-State Circuits

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