P. Cenci, M. Bolatkale, R. Rutten, M. Ganzerli, G. Lassche, K. Makinwa, L. Breems
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A 3.2mW SAR-assisted CTΔ∑ ADC with 77.5dB SNDR and 40MHz BW in 28nm CMOS
This paper presents a SAR-assisted Continuous-time Delta-Sigma $( \mathrm { CT } \Delta \Sigma )$ ADC, which combines the energy efficiency of SAR ADCs with the relaxed driving requirements of $\mathrm { CT } \Delta \Sigma$ ADCs, as well as similar anti-alias filtering. When clocked at 2.4GHz, the ADC achieves 77.5dB SNDR in 40MHz BW. It consumes 3.2mW, resulting in a state-of-the-art Walden FoM of 6.5fJ/cs and a Schreier FOM of 178.5dB.
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