{"title":"高相数串联电容降压变换器的调制改进","authors":"Gianluca Roberts, A. Prodic","doi":"10.1109/COMPEL52896.2023.10220443","DOIUrl":null,"url":null,"abstract":"This paper presents various phase activation sequences which raise the maximum input-to-output voltage conversion ratio of an N-inductor, N-phase Series-Capacitor (SerC) Buck Converter beyond the traditional limit of $1/N^{2}$. Phase counts up to 16 are analysed with conversion ratios increasing by a factor of up to 7. This paper additionally introduces a modulation technique that effectively increases the DPWM output voltage resolution by a factor of N by employing a novel method of minor duty increments (MDI). An experimental discrete prototype of an 11-phase, 48V–1.0VSerC Buck was fabricated to validate both the increase in the output voltage ceiling and DPWM resolution, as well as to evaluate the MDI-DPWM output voltage linearity.","PeriodicalId":55233,"journal":{"name":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","volume":"116 1","pages":"1-8"},"PeriodicalIF":1.0000,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Modulation Improvements for High Phase-Count Series-Capacitor Buck Converters\",\"authors\":\"Gianluca Roberts, A. Prodic\",\"doi\":\"10.1109/COMPEL52896.2023.10220443\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents various phase activation sequences which raise the maximum input-to-output voltage conversion ratio of an N-inductor, N-phase Series-Capacitor (SerC) Buck Converter beyond the traditional limit of $1/N^{2}$. Phase counts up to 16 are analysed with conversion ratios increasing by a factor of up to 7. This paper additionally introduces a modulation technique that effectively increases the DPWM output voltage resolution by a factor of N by employing a novel method of minor duty increments (MDI). An experimental discrete prototype of an 11-phase, 48V–1.0VSerC Buck was fabricated to validate both the increase in the output voltage ceiling and DPWM resolution, as well as to evaluate the MDI-DPWM output voltage linearity.\",\"PeriodicalId\":55233,\"journal\":{\"name\":\"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering\",\"volume\":\"116 1\",\"pages\":\"1-8\"},\"PeriodicalIF\":1.0000,\"publicationDate\":\"2023-06-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.1109/COMPEL52896.2023.10220443\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1109/COMPEL52896.2023.10220443","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS","Score":null,"Total":0}
Modulation Improvements for High Phase-Count Series-Capacitor Buck Converters
This paper presents various phase activation sequences which raise the maximum input-to-output voltage conversion ratio of an N-inductor, N-phase Series-Capacitor (SerC) Buck Converter beyond the traditional limit of $1/N^{2}$. Phase counts up to 16 are analysed with conversion ratios increasing by a factor of up to 7. This paper additionally introduces a modulation technique that effectively increases the DPWM output voltage resolution by a factor of N by employing a novel method of minor duty increments (MDI). An experimental discrete prototype of an 11-phase, 48V–1.0VSerC Buck was fabricated to validate both the increase in the output voltage ceiling and DPWM resolution, as well as to evaluate the MDI-DPWM output voltage linearity.
期刊介绍:
COMPEL exists for the discussion and dissemination of computational and analytical methods in electrical and electronic engineering. The main emphasis of papers should be on methods and new techniques, or the application of existing techniques in a novel way. Whilst papers with immediate application to particular engineering problems are welcome, so too are papers that form a basis for further development in the area of study. A double-blind review process ensures the content''s validity and relevance.