高速接口的电源噪声诱发抖动建模与优化

2015 IEEE Custom Integrated Circuits Conference (CICC) Pub Date : 2015-11-30 DOI:10.1109/CICC.2015.7338439

D. Oh, Yujeong Shim, Guang Chen

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引用次数: 4

摘要

•配电网络设计中的问题和挑战•电源诱发抖动(PSIJ)建模基础-配电网络(PDN)建模-抖动灵敏度函数建模•关键应用的PSIJ设计和建模-内存和并行总线接口-串行链路-数字逻辑时序。

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Supply noise induced jitter modeling and optimization for high-speed interfaces

• Issues and challenges in power distribution network design • Basics of power supply induced jitter (PSIJ) modeling — Power distribution network (PDN) modeling — Jitter sensitivity function modeling • PSIJ design and modeling for key applications — Memory and parallel bus interfaces — Serial links — Digital logic timing.

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来源期刊

2015 IEEE Custom Integrated Circuits Conference (CICC)

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