{"title":"基于FPGA的水下航行器嵌入式定位处理器体系结构","authors":"M. H. Salih, Mohd Rizal Arshad","doi":"10.1109/ISIEA.2009.5356502","DOIUrl":null,"url":null,"abstract":"The computation of parallel problems by FPGA calls for mobile computing, that uses an array of independent, locally connected processing elements, or logic elements, which compute a problem in parallel technique. Computing cells determines FPGA-based computer performance according to the possible cell density and the speedup over computation of a conventional single processor.","PeriodicalId":6447,"journal":{"name":"2009 IEEE Symposium on Industrial Electronics & Applications","volume":"16 1","pages":"56-61"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Architecture of an embedded localization processor for underwater vehicle using FPGA\",\"authors\":\"M. H. Salih, Mohd Rizal Arshad\",\"doi\":\"10.1109/ISIEA.2009.5356502\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The computation of parallel problems by FPGA calls for mobile computing, that uses an array of independent, locally connected processing elements, or logic elements, which compute a problem in parallel technique. Computing cells determines FPGA-based computer performance according to the possible cell density and the speedup over computation of a conventional single processor.\",\"PeriodicalId\":6447,\"journal\":{\"name\":\"2009 IEEE Symposium on Industrial Electronics & Applications\",\"volume\":\"16 1\",\"pages\":\"56-61\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-12-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE Symposium on Industrial Electronics & Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISIEA.2009.5356502\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE Symposium on Industrial Electronics & Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISIEA.2009.5356502","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Architecture of an embedded localization processor for underwater vehicle using FPGA
The computation of parallel problems by FPGA calls for mobile computing, that uses an array of independent, locally connected processing elements, or logic elements, which compute a problem in parallel technique. Computing cells determines FPGA-based computer performance according to the possible cell density and the speedup over computation of a conventional single processor.
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