{"title":"标准单元兼容双向中继器与晶闸管辅助","authors":"Sudhir K. Satpathy, D. Sylvester, D. Blaauw","doi":"10.1109/VLSIC.2012.6243846","DOIUrl":null,"url":null,"abstract":"A thyristor-assisted standard cell compatible self-timed bidirectional repeater with no configuration overhead enables 8mm interconnects to achieve 37% higher speed at 20% lower energy over conventional repeaters in 65nm CMOS at 1.0V. Bidirectional operation without the need for configuration logic removes the need for clocking, yielding up to 14× higher energy efficiency at low data switching activity.","PeriodicalId":6347,"journal":{"name":"2012 Symposium on VLSI Circuits (VLSIC)","volume":"64 1","pages":"174-175"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A standard cell compatible bidirectional repeater with thyristor assist\",\"authors\":\"Sudhir K. Satpathy, D. Sylvester, D. Blaauw\",\"doi\":\"10.1109/VLSIC.2012.6243846\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A thyristor-assisted standard cell compatible self-timed bidirectional repeater with no configuration overhead enables 8mm interconnects to achieve 37% higher speed at 20% lower energy over conventional repeaters in 65nm CMOS at 1.0V. Bidirectional operation without the need for configuration logic removes the need for clocking, yielding up to 14× higher energy efficiency at low data switching activity.\",\"PeriodicalId\":6347,\"journal\":{\"name\":\"2012 Symposium on VLSI Circuits (VLSIC)\",\"volume\":\"64 1\",\"pages\":\"174-175\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 Symposium on VLSI Circuits (VLSIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2012.6243846\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 Symposium on VLSI Circuits (VLSIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2012.6243846","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A standard cell compatible bidirectional repeater with thyristor assist
A thyristor-assisted standard cell compatible self-timed bidirectional repeater with no configuration overhead enables 8mm interconnects to achieve 37% higher speed at 20% lower energy over conventional repeaters in 65nm CMOS at 1.0V. Bidirectional operation without the need for configuration logic removes the need for clocking, yielding up to 14× higher energy efficiency at low data switching activity.
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